.stp.v2 {
	--bdr-clr-o: 0.3;

	/* One connector per gap (design shows a single dash between chips): only the item's
	   left rail carries bdr_tp, shifted onto the midpoint between this chip and the
	   previous one (half its own width back, plus half the ul's column gap). */
	li .fifth.bdr_tp {
		transform: translateX(calc(-50% - var(--grd-sp-dyn) / 2));
	}
}

/* ESCAPE HATCH (Contract §C) */
/* Left unscoped as authored: nesting it under .stp.v2 would raise specificity (0,1,0 -> 0,3,0). */

.stp-v2-num {
	--stp-v2-chip-clc: 5.556rem; /* { min: 4, max: 8, step: 0.25, friendly: 'Step Numeral Chip Size', group: 'Spacing' } */

	inline-size: var(--stp-v2-chip-clc);
	block-size: var(--stp-v2-chip-clc);
}